A flip-flop is a fundamental element used in the design of a digital electronic circuit. The flip-flop is an integral component of the digital circuits used for data storage (e.g., data storage devices, memory chips, etc.). In general, a “D” flip-flop has an input signal D and an output signal Q. The output signal stores a previous value of the input signal until the D flip-flop is triggered by a clock signal at which point the output signal Q takes on the current value of the input signal D.
Further, sequential cells (i.e., flip-flop) typically occupies approximately 60% of the physical area of the total standard cells area in a typical System-On-A-Chip (SoC) layout. Further, the sequential cells with the clock network contributes close to 50% of the total power consumed in the typical SoC. Further, any small cell level change in the sequential cells directly impacts the area and/or power consumed of the SoC in a bigger way.
In conventional circuits, the circuit has more semiconductor devices so that the leakage and the clock power is also more than circuits using D flip-flops. Further, the power consumption is high in a Sense-Amplifier based conventional circuit as the conventional circuit includes two pre-charging nodes and a high pre-charge load and/or clock path load. Further, the conventional circuits based on transmission gates and/or tri-state gates gated by clocks are not robust as because the operation of this type of conventional circuit is dependent on both clock phases. Further, this type of conventional circuits contains a clock buffer at the clock inputs which cause additional power dissipation at each and every clock transition.
Conventional circuits, designed using Fin Field-Effect Transistor (FINFET) has higher parasitic/pin capacitance compared to a planar transistor which results in relatively higher dynamic power numbers, as well as lesser speed. While leakage is under control in the FinFET, a dynamic power consumption accounts for a significant portion of total power consumption of the circuit using the FinFET.
Many conventional designs are proposed for improving the operation and function of the flip-flop but they include disadvantages in terms of current leakage, increased power consumption, lack of robustness, less reliability, integrity issues, increased operation dependency, increased time, increased cost, increased complexity, increased design time, increase in number of hardware components used, increase in physical size of the circuit, and so on.
Thus, it is desired to address the above mentioned disadvantages or other shortcomings and/or provide a useful alternative.